Images

Technical document
23/08/2021

100MHzInTheLoop.png (24.3 KB) 100MHzInTheLoop.png	block diagram	Peter Jansweijer, 23/08/2021 13:24
SPEC7_Integration.jpg (169 KB) SPEC7_Integration.jpg		Peter Jansweijer, 20/10/2021 14:16
_MG_5006_resize.JPG (132 KB) _MG_5006_resize.JPG	FMCBreakout_extended	Peter Jansweijer, 20/10/2021 14:21
100MHzInTheLoop.jpg (98.7 KB) 100MHzInTheLoop.jpg		Peter Jansweijer, 21/10/2021 13:50
100MHzInTheLoop_PCB.jpg (152 KB) 100MHzInTheLoop_PCB.jpg		Peter Jansweijer, 21/10/2021 13:55
TimingMainBoard_Preleminary.jpg (351 KB) TimingMainBoard_Preleminary.jpg		Peter Jansweijer, 06/12/2021 13:05
TimingMainBoard.png (207 KB) TimingMainBoard.png		Peter Jansweijer, 17/12/2021 11:03
100MHzInTheLoop_V1.0.png (284 KB) 100MHzInTheLoop_V1.0.png		Peter Jansweijer, 17/12/2021 11:09
100MHzInTheLoop.jpg (293 KB) 100MHzInTheLoop.jpg	PCB picture	Peter Jansweijer, 16/02/2022 09:51
TimingMainBoard.JPG (326 KB) TimingMainBoard.JPG	TimingMainBoard	Peter Jansweijer, 28/03/2022 14:04
SPEC7_integration_v1.jpg (621 KB) SPEC7_integration_v1.jpg		Peter Jansweijer, 25/04/2022 13:38
SPEC7_integration_v2.jpg (619 KB) SPEC7_integration_v2.jpg		Peter Jansweijer, 30/05/2022 14:01
FrontPanel.jpg (82.2 KB) FrontPanel.jpg	Front Panel	Peter Jansweijer, 10/06/2022 15:41
VirgoDemonstratorWRnode.jpg (256 KB) VirgoDemonstratorWRnode.jpg	Virgo Demonstrator WR-node	Peter Jansweijer, 10/06/2022 15:41

ETpathfinder Timing