Files
| File | Date | Size | D/L | Checksum | |
|---|---|---|---|---|---|
| ISOTDAQ_Lab14_SoC_FPGA_planning_v2.pdf | 17/11/2016 11:20 | 44.6 KB | 263 | MD5: 2a2a8e629b8c01ce970a29682cd1c355 | ISOTDAQ_Lab14_SoC_FPGA_planning_v2.pdf |
ET department:
PCB part-request board.ET PCB-layout planning.
Generate partnumber for PCB part request.
Default issue workflow:
CT Department:
-add handy stuff for CT
